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XtremeData is now shipping the first AMD Socket F (1207) based In-Socket Accelerator. The device is compatible with the newest Quad-Core AMD Opteron processor and incorporates dual Altera high-performance Stratix II FPGAs. The new XD2000F accelerator module targets financial data analytics and data communications system design applications. It plugs into servers via the HyperTransport technology bus at 800MT/s to significantly speed compute-intensive computer processing. The HyperTransport bus offers a high-bandwidth, low latency interface for other processors and memory in dual, quad and octal platforms. Placing the XD2000F in one or more of the CPU sockets gives the In-Socket Accelerator a high-speed link to memory as well as a fast connection to the host processor without requiring board modifications, while providing a simple hardware integration path, the vendor claims.

XtremeData News Release

Technorati Tags: XtremeData, AMD, Quad-Core AMD Opteron processor, Altera, Stratix II FPGAs, FPGAs, Hypertransport, XD2000F accelerator module

Tervela, developer of high performance messaging systems, has named Robert Cramer as CEO, to succeed Barry Thompson, Tervela’s founder, who becomes CTO. Cramer was previously CEO of LiveVault, a Software as a Service (SaaS) provider targeting the IT market. Tervela recently released a hardware accelerated messaging platform designed to give financial institutions the capacity to outpace exponentially increasing market data volumes. In production settings, customers have experienced up to a 1000X improvement in capacity and performance over legacy messaging systems, Tervela says.

Tervela News Release

Technorati Tags: Tervela, LiveVault, high performance messaging, hardware acceleration

Despite its presence at shows like SIFMA earlier in the year, Tervela yesterday officially emerged from stealth mode and showcased its TVA-1000 messaging appliance.
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Exegy will be previewing its Exegy Ticker Plant 2.0 at Monday’s High Performance on Wall Street show. New functionality includes hardware acceleration applied to level II data, which allows fast analysis of order books and market depth, access to North American and European exchange data an add-on framework that allows customizable analytics, including for arbitrage.
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From Intel …

Financial services firms know that forcing general-purpose CPUs to do it all is not the most efficient or productive means of accomplishing highly specialized tasks. Better to attach an optimized accelerator module to the system, one that is streamlined and loaded with algorithms for the task at hand.
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Tervela has bolstered its sales staff: Jay Miller and Feargal O’Sullivan join as regional sales directors. Miller was formerly with Cisco Systems, O’Sullivan with Reuters.

The company has also added Christopher Larsen, formerly with Tibco and SAP, to its advisory board.

Technorati Tags: tervela, jay miller, feargal o’sullivan, christopher larson

Securities Technology Analysis Center (STAC) has released results of a benchmark conducted on Exegy’s Ticker Plant (XTP), showing 80 microsecond mean latency at one million updates per second. The benchmark configuration included the Field Processor Gate Array (FPGA)-based XTP version 1.2, Mellanox Infiniband and clients running Red Hat Enterprise Linux 4.4 on AMD multicore processors.
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I’m referring to last week’s SIFMA Technology Management Conference and Exhibit in NYC. True, the new name (the result of the SIA’s merger with the Bond Association) was a bit of a put off - many people suggested that SIFMA sounded like some horrible strain of bird flu - but otherwise it’s been the best SIA (sic) Show I’ve been to in years.
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Hardware-based ticker plant vendor Exegy is working with DRC to deploy various financial trading applications leveraging DRC’s coprocessor modules. Exegy already uses AMD Opteron and Field Programmable Gate Array (FPGA) technology in its appliance, offering throughput of two million messages per second. The link up with DRC will allow its coprocessor to be hosted within Exegy’s appliance (in according with AMD’s Torrenza initiative using a Opteron core) providing tight coupling with minimal latency.

Technorati Tags: exegy, drc, amd, opteron, torrenza, fpga

The annual SIFMA (formerly SIA, now merged with the Bond Association) Technology Management Conference and Exhibit kicks off next Tuesday, and a number of companies from the down and dirty world of hardware - chip manufacturers, networking technology vendors etc. - will be on show. Here’s who to visit …
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