Panel: “Low-Latency Computing – Milliseconds and Microseconds, Now Even Nanoseconds”
Pushing down latency remains the goal of most trading operations, not always to be the fastest, but usually to be ahead of rivals. For some, that now means shaving off nanoseconds through hardware acceleration and shared memory. For others, it’s more about building a robust scalable architecture that can take advantage of performance increases from new technologies as they are introduced. For all, it means tracking the latest developments in hardware, systems software and development tools.
This panel reviewed the state of the art in: the hardware platform, such as multi-core and multi-socket architectures, hardware acceleration, and solid state disks; the middleware stack, including IPC and ITC messaging, in-memory databases and Java technologies; and how applications such as complex event processing (CEP), execution management systems, pre-trade risk and matching engines are being built to take full advantage of the latest hardware and systems software.
* Pete Harris, Publisher & Editor, Low-Latency.com (Moderator)
* Matt Dangerfield, Head of Trading Solutions, Fixnetix
* Stuart Grant, EMEA Business Development Manager - Financial Services, Sybase
* Todd Montgomery, Vice President, Architecture, Messaging Business Unit, Informatica
* Ian Pearl, Senior Director, Capital Markets, Oracle
* Mat Young, Senior Director, EMEA, Fusion-io
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